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Programmable Frequency, 2A Output 30V Step-Down Switching Regulator
POWER MANAGEMENT Description
The SC4524 is an adjustable frequency peak currentmode step-down switching regulator with an integrated 2.3A, 30V switch. The SC4524 can be programmed up to 1.5MHz. This allows the use of small inductor and ceramic capacitors, resulting in very compact power supplies. The SC4524 is suitable for next generation XDSL modems, set-top boxes and point of load applications.
SC4524
Features
u u u u
Up to 1.5 MHz Programmable Switching Frequency 2.3A Integrated Switch Wide Input Voltage Range 2.8V to 30V Peak Current-Mode Control with Cycle-by-Cycle Current Limiting Hiccup Overload Protection Soft-Start and Enable Thermal Shutdown Thermally Enhanced 8-Pin SOIC Package Fully WEEE and RoHS Compliant
u u u The SC4524 uses peak current-mode PWM control for ease of compensation. Cycle-by-cycle current limit and u hiccup overload protection reduce power dissipation u
during overload. Combined soft start and enable pin not only eliminates output start up overshoot but also allows power sequencing. The SC4524 is available in SOIC-8 EDP package.
Applications
u u u u u u
XDSL and Cable Modems Set-top Boxes Point of Load Applications CPE Equipment DSP Power Supplies Disk Drives
Typical Application Circuit
Efficiency
90
V IN
24V
85
IN
D1
SS
C7 22nF
BST
Efficiency (%)
C2 1N4148 0.1mF L1
80
OUT 5V/2A R1 22.1k
SC4524
COMP
SW
75 70 65 60 55
4.7mH
FB
C6 22pF
R5 15.4k
C5 470pF
ROSC
R3 17.4k
GND
C3 10mF
D2 20BQ030
C1 22mF
R2 5.49k
L1: Coiltronics FP3-4R7
C1: Murata GRM21BR60J226M
C3: Murata GRM32ER71H106K
50 0.0 0.5 1.0 1.5 2.0 Load Current (A)
Figure 1. 1MHz 24V to 5V/2A Step-down Converter.
Revision: December 30th, 2006 1 www.semtech.com
SC4524
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter Input Voltage BST Pin BST Pin Above SW SS Pin FB Pin SW Voltage SW Transient Spikes (<10ns Duration) Operating Ambient Temperature Range Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Maximum Junction Temperature Storage Temperature Range Lead Temperature (Soldering)10 sec ESD Rating (Human Body Model)
Notes: This device is ESD sensitive. ESD handling precaution is required.
Symbol VIN VBST VBST-VSW VSS VFB VSW VSW TA JA JC TJ TSTG TLEAD ESD
Max -0.3 to 32 42 24 3 -0.3 to VIN -0.6 to VIN VIN +1.5 -2.5 -40 to 85 36 5.5 150 -65 to +150 300 1500
Units V V V V V V V C C/W C/W C C C V
Electrical Characteristics
Unless specified: -40C < TA < 85C, -40C < TJ< 105C, ROSC = 12.1k, VIN = 5V, VBST = 8V
Parameter Maximum Operating VIN VIN Start Voltage VIN Start Hysteresis VIN Quiescent Current VIN Quiescent Current in Shutdown Feedback Voltage Feedback Voltage Line Regulation FB Pin Input Bias Current Error Amplifier Transconductance
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Conditions
Min
Typ
Max 30
Units V V mV
2.45
2.62 75
2.78
Not switching VSS = 0V 0.980 VIN = 3V to 30V VFB = 1V, VCOMP = 1.5V
2
3.5 40 1.000 0.005 -15 280
5 60 1.020
mA A V %/ V
-30
nA -1
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SC4524
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: -40C < TA < 85C, -40C < TJ< 105C, ROSC = 12.1k, VIN = 5V, VBST = 8V
Parameter Error Amplifier Open-Loop Gain COMP Source Current COMP Sink Current COMP Pin to Switch Current Gain COMP Switching Threshold COMP Maximum Voltage Switching Frequency Maximum Duty Cycle Switch Current Limit Switch Saturation Voltage Switch Leakage Current Minimum BST Voltage BST Pin Current Minimum Soft-Start Voltage to Exit Shutdown Soft-start Charging Current Soft-start Discharging Current Minimum Soft-start Voltage to Enable Overload Shutoff FB Overload Threshold Soft-start Voltage to Restart Switching After Overload Shutoff Thermal Shutdown Temperature Thermal Shutdown Hysteresis
Conditions
Min
Typ 53
Max
Units dB A A A/V
VFB = 0.8V, VCOMP = 1.5V VFB = 1.2V, VCOMP = 1.5V
20 20 8 0.7 1.1 2.2 1.2 1.4 90 3.2 0.3 10 1.6 1.3
V V MHz % A V A V mA mA
VFB = 0.9V
(Note 2) (Note 1) ISW = -2A
80 2.3
ISW = -2A ISW = -0.5A ISW = -2A 0.2 V S S = 0V VSS = 1.5V VSS = 1.5V VSS Rising VSS = 2.3V, VFB Falling VSS Falling 0.7
1.8 20 60 0.4 2 1.8 0.8 2 0.7 1 155 10
2.5
0.7
V A A A V V
1.3
V C C
Notes: (1) Guaranteed by design, not tested in production. (2) The maximum duty cycle specified corresponds to 1.4MHz switching frequency. Duty cycles higher than those specified can be achieved by lowering the operating frequency.
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SC4524
POWER MANAGEMENT Pin Configuration
TOP V IEW
SW
VIN ROSC GND
Ordering Information
Part Number SC4524SETRT(1)(2)
BST
FB COMP SS
P ackag e SOIC-8 EDP Evaluation Board
1
2
3
4
8 7 6 5
S C 4524E V B
(8 Pin SOIC -EDP)
Underside metal must be soldered to ground.
Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant.
Pin Descriptions
SO-8EDP 1 2 3 4 Pin Name SW VIN ROSC GND Pin Function The emi tter of the i nternal NP N power transi stor. C onnect thi s pi n to the i nductor and the freewheeling diode. Power supply to the SC4524. It is also connected to the collector of the internal NPN power transistor. It must be bypassed with a ceramic capacitor to ground. Frequency setting pin. An external resistor from his pin to the ground sets the oscillator frequency. Ground pin. Soft start and enable pin. (1). A capacitor from SS pin to the ground provides soft-start and overload hiccup functions. Soft start is recommended for all applications. (2). Pulling SS pin below 0.4V shuts off the regulator and reduces the input supply current to 40uA at 5V. Compensation pin. It is also the output of the internal error amplifier. (1). A RC network at this pin compensates the control loop. (2). The voltage at this pin controls the peak current of the internal switch. The output voltage feedback pin. It is also the inverting input of the error amplifier. Supply pin to the power transistor driver. Tie to external bootstrap circuit to generate a local supply voltage higher than the input voltage in order to fully turn on the internal power transistor. The exposed pad at the bottom of the package is electrically connected to the ground pin of the SC4524. It also provides a thermal contact to the circuit board. It has to be soldered to the analog ground of the PC board.
5
SS
6 7 8 Metal P ad
COMP FB BST
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SC4524
POWER MANAGEMENT Block Diagrams
2
VIN
S
+ +
+ ILIM -
+ ISEN 6.3mW 20m V
BST
8
SLOPE COMP
COMP
6
FB
7
-
EA
+
SS
5
+ PWM -
S Q R POWER TRANSISTOR
FB
1
SW
1V
0.7V
REFERENCE & THERMA L SHUTDOW N
FAULT
Soft-Start And O verload Hiccup Control
OVLD
SLO PE COMP
4
GND
SLOPE COMP
ROSC
3
OSCILLATOR
CLK
Figure 2. SC4524 Functional Diagram
FB 0.7V
+ 1.8mA
S Q R
SS
OVLD
1V/2 V
FAULT
2.6mA
Figure 3. Details of the Soft-Start and Overload Hiccup Control Circuit
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SC4524
POWER MANAGEMENT Typical Characteristics
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SC4524
POWER MANAGEMENT Typical Characteristics
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SC4524
POWER MANAGEMENT Operation
The SC4524 is a 30V constant-frequency peak currentmode step-down switching regulator with an integrated 2.3A power transistor. The switching frequency can be programmed with an external resistor from the ROSC pin to ground. Frequency adjustability makes switching regulator design flexible. Peak current mode control is utilized for the SC4524. The double reactive poles of the output LC filter are reduced to a single real pole by the inner current loop, easing loop compensation. Fast transient response can be achieved with a simple Type-2 compensation network. Switch collector current is sensed with an integrated 6.3mW sense resistor. The sensed current is summed with slope-compensating ramp before it is compared with the transconductance error amplifier output. The PWM comparator trip point determines the switch turn-on pulse width (Figure 2). The current-limit comparator ILIM turns off the power switch when the sensed-signal exceeds the 20mV current-limit threshold. ILIM therefore provides cycle-by-cycle limit. Current-limit does not vary with dutycycle. Driving the base of the power transistor above the input power supply rail minimizes the power transistor turn-on voltage and maximizes efficiency. An external charge pump (or bootstrap circuit) generates a voltage higher than the input rail at the BST pin. The bootstrapped voltage generated becomes the supply voltage for the power transistor driver. The SS pin is a multiple-function pin. An external capacitor connected from the SS pin to ground together with the internal 1.8A and 2.6A current sources set the softstart and overload shutoff times of the regulator (Figure 3). The SS pin can also be used to shut off the regulator. When the SS pin is pulled below 0.8V, the regulator is turned off. If the SS pin is pulled below 0.2V, then the SC4524 will undergo overall shutdown. The current drawn from the input power supply reduces to 40A. When the SS pin is released, the soft-start capacitor is charged with a 2A current source (not shown in Figure 3). As the SS voltage exceeds 0.4V, the internal bias circuit of the SC4524 is enabled. The SC4524 draws 3.5mA from VIN. An internal fast charge circuit quickly charges the softstart capacitor to 1V. At this juncture, the fast charge circuit turns off and the 1.8A current source slowly charges the soft-start capacitor. The output of the error amplifier is forced to track the slow soft-start ramp at the SS pin. When the COMP voltage exceeds 1.1V, the switching regulator starts to switch. During soft-start, the current limit of the converter is gradually increased until the converter output comes into regulation. Hiccup overload protection is utilized in the SC4524. Overload shutdown is disabled during soft-start (VSS < 2V). In Figure 3 the reset input of the overload latch will remain high if the SS voltage is below 2V. Once the softstart capacitor is charged above 2V, the overload shutdown latch is enabled. As the load draws more current from the regulator, the current-limit comparator will limit the peak inductor current. This is cycle-by-cycle current limiting. Further increase in load current will cause the output voltage to decrease. If the output voltage falls below 70% of its set point, then the overload latch will be set and the soft-start capacitor will be discharged with a net current of 0.8A. The switching regulator is shut off until the soft-start capacitor is discharged below 1V. At this moment, the overload latch is reset. The softstart capacitor is recharged and the converter again undergoes soft-start. The regulator will go through softstart, overload shutdown and restart until it is no longer overloaded.
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SC4524
POWER MANAGEMENT Applications Information
Setting the Output Voltage The regulator output voltage is set with an external resistive divider (Figure 4) with its center tap tied to the FB pin.
WPVU
The switching frequency is limited by the minimum controllable on time at low duty cycles. For VIN > 20V, setting switching frequency below 500kHz makes converter output short circuit operation more robust. These will be described in more details later. Minimum On Time Consideration
S $6
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A7A
A
S!
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The operating duty cycle of a non-synchronous step-down switching regulator in continuous-conduction mode (CCM) is given by
'=
Figure 4. VOUT is set with a Resistive Divider
5 = 5 9287 -
9287 + 9' 9,1 + 9' - 9&(6$7
(2)
(1)
where VCESAT is the switch saturation voltage and VD is voltage drop across the rectifying diode. Duty cycle decreases with increasing
The percentage error due the input bias current of the error amplifier is
5 D9287 - Q$ 1/4 1/4 5OI = . 9287 9
9 9
,1
ratio. In peak
287
Example: Determine the output voltage error of a 9287 = 9 converter with 5 = NW . From (1),
5 = NW 1/4 - = NW
current-mode control, the PWM modulating ramp is the sensed current ramp of the power switch. This current ramp is absent unless the switch is turned on. The intersection of this ramp with the output of the voltage feedback error amplifier determines the switch pulse width. The propagation delay time required to immediately turn off the switch after it is turned on is the minimum controllable switch on time (TON(MIN)). Closedloop measurement of the SC4524 with low
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D9287 - Q$ 1/4 1/4 NOIN = = - . 9287 9
9 9
287
ratios
,1
This error is at least an order of magnitude lower than the ratio tolerance resulting from the use of 1% resistors in the divider string. Setting the Switching Frequency The switching frequency of the SC4524 is set with an external resistor from the ROSC pin to ground. A graph of switching frequency against ROSC is shown in Typical Performance Characteristics. The switching frequency is programmable up to 1.5MHz.
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1 , 0 1 2
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Figure 5. Variation of Minimum On Time with Ambient Temperature.
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SC4524
POWER MANAGEMENT Applications Information
shows that the minimum on time is about 105ns at room temperature (Figure 5). The power switch in the SC4524 is either not turned on at all or for at least TON(MIN). If the required switch on time (=
' ) is shorter than the minimum I on time, the regulator will either skip cycles or it will jitter.
'= + = . + -
The maximum operating channel frequency of the converter is therefore
-' = .+] . QV
Example: Determine the maximum operating frequency of a 24V to 1.2V switching regulator using the SC4524. Assuming that VD = 0.45V, VCESAT = 0.25V and VIN = 26.4V (10% high line), the duty ratio can be calculated using (2).
'= + = + -
Transient headroom requires that channel frequency be lower than 410kHz. Inductor Selection The inductor ripple current DIL for a non-synchronous step-down converter in continuous-conduction mode is
D,/ = 9287 + 9' - ' 9287 + 9' 9,1 - 9287 - 9&(6$7 = I/ 9,1 + 9' - 9&(6$7 I/
To allow for transient headroom, the minimum operating switch on time should be at least 30% higher than the worst-case minimum on time exhibited in Figure 5. Designing for a switch on time of 150ns at 9 = 9 ,
,1
(3) where f is the switching frequency and L is the inductance. In current-mode control, the slope of the modulating (sensed switch current) ramp should be steep enough to lessen jittery tendency but not so steep that large flux swing decreases efficiency. Inductor ripple current DIL between 25-40% of the peak inductor current limit is a good compromise. Inductors so chosen are optimized in size and DCR. Setting D,/ = = $ ,
9' = 9 and 9&(6$7 = 9 in (3),
the maximum operating frequency is Minimum Off Time Limitation
' = .+] . QV
The PWM latch in Figure 2 is reset every period by the clock. The clock also turns off the power transistor to refresh the bootstrap capacitor. This minimum off time limits the attainable duty cycle of the regulator at a given switching frequency. The measured minimum off time is 120ns. For a step-down converter, D increases with increasing
9 9
287
ratio. If the required duty cycle is higher
/=
9
287
,1
+ 9 - 9 - 9 + I
,Q 287 ,1
(4)
than the attainable maximum, then the output voltage will not be able to reach its set value in continuousconduction mode. Example: Determine the maximum operating frequency of a 5V to 4V switching regulator using the SC4524. Assuming that VD = 0.45V, VCESAT = 0.25V and VIN = 4.5V (10% low line), the duty ratio can be calculated using (2).
where L is in mH and f is in MHz. Equation (3) shows that for a given 9287 D,/ increases as D decreases. If 9 varies over a wide range, then choose L based on the nominal input voltage. Always verify converter operation at the input voltage extremes.
,1
The peak current limits of both SC4524 power transistors are internally set at 3.2A. The peak current limits are
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SC4524
POWER MANAGEMENT Applications Information
duty-cycle invariant and are guaranteed higher than 2.3A. The maximum load current is therefore conservatively
, = ,/0 D,/ D, = $ - /
10mF X5R ceramic capacitor is adequate. For high voltage applications, a small ceramic (1mF or 2.2mF) can be placed in parallel with a low ESR electrolytic capacitor to satisfy both the ESR and bulk capacitance requirements. Output Capacitor The output ripple voltage DVOUT of a buck converter can be expressed as
287 0$;
(5)
If D,/ = 1/4 ,/0 , then
,
2870$;
=,
/0
-
D, =,
/
/0
-
,
/0
= 1/4 ,/0 .
E U U D9287 = D,/ I (65 + I I& 287 U I Y
where COUT is the output capacitance.
(7)
The saturation current of the inductor should be 20-30% higher than the peak current limit (2.3A). Low-cost powder iron cores are not suitable for high-frequency switching power supplies due to their high core losses. Inductors with ferrite cores should be used. Power Line Input Capacitor A buck converter draws pulse current with peak-to-peak amplitude equal to its output current IOUT from its input supply. An input capacitor placed between the supply and the buck converter filters the AC current and keeps the current drawn from the supply to a DC constant. The input capacitance CIN should be high enough to filter the pulse input current. Its equivalent series resistance (ESR) should be low so that power dissipated in the capacitor does not result in significant temperature rise and degrade reliability. For a buck converter, the RMS ripple current in the input capacitor is
,506 = ,287 ' - ' .
Inductor ripple current DIL increases as D decreases (Equation (3)). The output ripple voltage is therefore the highest when VIN is at its maximum. The first term in (7) results from the ESR of the output capacitor while the second term is due to the charging and discharging of COUT by the inductor ripple current. Substituting DIL = 0.69A, f = 500kHz and COUT = 22mF ceramic with ESR = 2mW in (7),
D9287 = $ 1/4 PW + PW = P9 + P9 = P9
Depending on operating frequency and the type of capacitor, ripple voltage resulting from charging and discharging of COUT may be higer than that due to ESR. A 10mF to 47mF X5R ceramic capacitor is found adequate for output filtering in most applications. Ripple current in the output capacitor is not a concern because the inductor current of a buck converter directly feeds COUT, resulting in very low ripple current. Avoid using Z5U and Y5V ceramic capacitors for output filtering because these types of capacitors have high temperature and high voltage coefficients. Freewheeling Diode Use of Schottky barrier diodes as freewheeling rectifiers reduces diode reverse recovery input current spikes, easing high-side current sensing in the SC4524. These diodes should have an average forward current rating between 1A and 2A and a reverse blocking voltage of at least a few volts higher than the input voltage. For switching regulators operating at low duty cycles (i.e. low
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&,1
(6)
Power dissipated in the input capacitor is ,506
&,1
1/4 (65 .
Equation (6) has a maximum value of
, 1/4 (65 287 in CIN.
,287 ( at ' = ), corresponding to the worst-case power dissipation
Multi-layer ceramic capacitors, which have very low ESR (a few mW) and can easily handle high RMS ripple current, are the ideal choice for input filtering. A single 4.7mF or
a 2006 Semtech Corp.
SC4524
POWER MANAGEMENT Applications Information
output voltage to input voltage conversion ratios), it is beneficial to use freewheeling diodes with somewhat higher average current ratings (thus lower forward voltages). This is because the diode conduction interval is much longer than that of the transistor. Converter efficiency will be improved if the voltage drop across the diode is lower. The freewheeling diodes should be placed close to the SW pins of the SC4524 to minimize ringing due to trace inductance. 10BQ015, 20BQ030 (International Rectifier), MBRM120LT3 (ON Semi), UPS120 and UPS140 (MicroSemi) are all suitable. Bootstrapping the Power Transistors To maximize efficiency, the turn-on voltage across the internal power NPN transistor should be minimized. If the transistor is to be driven into saturation, then its base will have to be driven from a power supply higher in voltage than VIN. The required driver supply voltage (at least 2.5V higher than the SW voltage over the industrial temperature range) is generated with a bootstrap circuit (the diode DBST and the capacitor CBST in Figure 7). The bootstrapped output (the common node between DBST and CBST) is connected to the BST pin of the SC4524. The power transistor in the SC4524 is first switched on to build up current in the inductor. When the transistor is switched off, the inductor current pulls the SW node low, allowing CBST to be charged through DBST. When the power switch is again turned on, the SW voltage goes high. This brings the BST voltage to 96: + 9& %67 , thus backbiasing DBST. CBST voltage increases with each subsequent switching cycle, as does the bootstrapped voltage at the BST pin. After a number of switching cycles, CBST will be fully charged to a voltage approximately equal to that applied to the anode of DBST. Figure 6 shows the typical minimum BST to SW voltage required to fully saturate the power transistor. This differential voltage ( = 9& %67 ) must be at least 1.8V at room temperature. This is also specified in the Electrical Characteristics as Minimum Bootstrap Voltage. The minimum required VCBST increases as temperature decreases. The bootstrap circuit reaches equilibrium when the base charge drawn from CBST during transistor on time is equal to the charge replenished
a 2006 Semtech Corp. 12
during the off interval.
,6: , 6: , where ISW and b + are the switch emitter current and current gain respectively, is drawn from the bootstrap capacitor CBST.
The switch base current =
,7 Charge 6: 21 is drawn from CBST during the switch on
time, resulting in a voltage droop of
, 6: 721 . If ISW = 2A, &%67
TON = 1ms, b = 35 and CBST = 0.1mF, then the 9&%67 droop will be 0.57V. CBST is refreshed to 9$ - 9'%67 + 9'5(&7 every cycle, where 9$ is the applied DBST anode voltage. Switch base current discharges the bootstrap capacitor to
9$ - 9'%67 + 9'5(&7 ,6: 721 at the end of conduction. This b& %67
voltage must be higher than the minimum shown in Figure 6 to ensure full switch enhancement. DBST can be tied either to the input or to the output of the DC/DC converter. If DBST is tied to the input, then the charge drawn from the input power supply will be
, 6: 721 (the base charge b of the switch). The energy loss due to base charge per
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Figure 6. Typical Minimum Bootstrap Voltage Required to Maintain Saturation at ISW = 2A.
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SC4524
POWER MANAGEMENT Applications Information
cycle is
I SW VIN TON DI SW VIN I SW VOUT for a power loss of . b b b
loss of
DI SW VOUT . b
If DBST is tied to the output, then the charge drawn from the output capacitor will still be due to base charge per cycle is
I SW TON . The energy loss b I SW VOUT TON for a power b
Since VOUT < VIN, D BST should always be tied to VOUT (if >2.5V) to maximize efficiency. In general efficiency penalty increases as D decreases. Figure 7 summarizes various ways of bootstrapping the SC4524. A fast switching PN diode (such as 1N4148 or
MAX VBST = VIN + VOUT
DBST
DBST
MAX VBST = 2VIN
BST
VIN
CBST
BST
CBST
IN
SW
VOUT
VIN
IN
SW
VOUT
SC4524
GND
D RECT
SC4524
GND
DRECT
(a)
DBST
DZ + VZ -
(b)
MAX VBST = 2VIN - VZ
VS > 2.5V
DBST
MAX VBST = VIN + VS
BST
VIN
CBST
BST
VOUT
CBST
VIN
VOUT
IN
SW
IN
SW
SC4524
GND
DRECT
SC4524
GND
D RECT
(c)
VS > VIN + 2.5V
(d)
DBST
MAX VBST = VS
BST
VIN
VOUT
IN
SW
SC4524
GND
D RECT
(d)
Figure 7. Methods of Bootstrapping the SC4524.
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SC4524
POWER MANAGEMENT Applications Information
1N914) and a small (0.1F - 0.47F) ceramic capacitor can be used. In Figure 7(a) the power switch is bootstrapped from the output. This is the most efficient configuration and it also results in the least voltage stress at the BST pin. The maximum BST pin voltage is about VIN + VOUT . If the output is below 2.8V, then DBST will T preferably be a small Schottky diode (such as BAT-54) to maximize bootstrap voltage. A 0.33-0.47F bootstrap capacitor may be needed to reduce droop. Bench measurement shows that using Schottky bootstrapping diode has no noticeable efficiency benefit. The SC4524 can also be bootstrapped from the input (Figure 7(b)). This configuration is not as efficient as Figure 7(a). However this may be only option if the output voltage is less than 2.5V and there is no other supply with voltage higher than 2.5V. Voltage stress at the BST pin can be somewhat higher than 2VIN. The Zener diode in Figure 7(c) reduces the maximum BST pin voltage. The BST pin voltage should not exceed its absolute maximum rating of 42V. Figures 7(d) and (e) show how to bootstrap the SC4524 from a second power supply VS with voltage > 2.5V. Since the inductor current charges CBST, the bootstrap circuit requires some minimum load current to get going. Figures 8(a) and 8(b) show the dependence of the minimum input voltage required to properly bootstrap a
Minimum Starting and Sustaining VI N vs Load Current
7.5 Minimum Input Voltage (V)
DB S T TIED TO OUTPUT V OUT = 5V
5V and a 3.3V converters on the load current. Once started the bootstrap circuit is able to sustain itself down to zero load. Shutdown and Soft-Start Pulling the soft-start pin below 0.8V with an opencollector NPN or an open-drain NMOS transistor turns off the regulator. In "Typical Characteristics", the softstart pin current is plotted against the soft-start voltage with VIN = 5V. When the soft-start pin is pulled below 1V, 105A current flows out of the pin. Pulling the soft-start pin below 0.2V shuts off the internal bias circuit of the SC4524. The total VIN current decreases to 40A. In shutdown the SS pin sources only 2A. A fast charging circuit (enabled by the internal bias circuit), which charges the soft-start capacitor below 1V, causes the difference in the soft-start pin currents. If the SS pin is released in shutdown, the internal current source pulls up on the SS pin. When this SS voltage reaches 0.4V, the SC4524 turns on and the VINquiescent current increases to 3.5mA. The fast charging circuit quickly pulls the released soft-start capacitor to 1V (slightly below the switching threshold). The fast charging circuit is then disabled. A 1.8A current source continues to charge the soft-start capacitor (Figure 3). The soft-
Minimum Starting and Sustaining VI N vs Load Current
5.5 Minimum Input Voltage (V)
DBST TIED TO OUTPUT V OUT = 3.3V MA729
7.0 6.5
MA729
5.0
STARTING
STARTING
6.0 5.5 5.0 4.5 1 10 100 1000 Load Current (mA)
DBST TIED TO INPUT SUSTAINING
4.5
DBST TIED TO INPUT
4.0
SUSTAINING
3.5 0.1 1.0 10.0 100.0 1000.0 Load Current (mA)
(a)
(b)
Figure 8. Minimum Input Voltage Required to Start and to Maintain Bootstrap.(TA = 25C).
(c) 2006 Semtech Corp. 14 www.semtech.com
SC4524
POWER MANAGEMENT Applications Information
start voltage ramp at the SS pin clamps the error amplifier output (Figure 2). During regulator start-up, COMP voltage follows the SS voltage. The converter starts to switch when its COMP voltage exceeds 1.1V. The peak inductor current gradually increases until the converter output comes into regulation. Proper soft-start prevents output overshoot during start-up. Current drawn from the input supply is also well controlled. Notice that the inductor current, not the converter output voltage, is ramped during soft-start. The soft-start capacitor is charged to a final voltage of about 2.4V. Overload / Short-Circuit Protection The current limit comparator in the SC4524 limits the peak inductor current to 3.2A (typical). The regulator output voltage will fall if the load is increased above the current limit. If overload is detected (the output voltage falls below 70% of the set voltage), then the regulator will be shut off. An internal 0.8A current sink starts to discharge the soft-start capacitor. As the soft-start capacitor is discharged below 1V, the discharge current source turns off and the soft-start capacitor is recharged with a 1.8A current source. The regulator undergoes soft-start. During soft-start (1V < VSS < 2V), the overload shutdown latch in Figure 3 cannot be set. When VSS exceeds 2V, the set input of the overload latch is no
2.4V 2V
VSS
Hiccup Enabled
1V 0.3V 0
1V 0.7V
Fast Charge
VFB
Switching Starts
0
Output must be at least 70% of its set voltage in this interval or the regulator will undergo shutdown and restart (hiccup).
Figure 9(a). Normal Soft-start.
2V
VSS VCOMP
1V 0.3V 0
Switching
Not Switching
Switching
Not Switching
1V 0.7V VFB 0
Figure 9(b).
2006 Semtech Corp.
Start-up Fails due to (i) Short Soft-start Duration or (ii) Output Overload or (iii) Output Short-circuited.
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SC4524
POWER MANAGEMENT Applications Information
longer blanked. If VFB is still below 0.7V, then the regulator will undergo shutdown and restart. The soft-start process should allow the output voltage to reach 70% of its final value before CSS is charged above 2V. Figures 9(a) and 9(b) show the timing diagrams of successful and failed start-up waveforms respectively. The soft-start interval should also be made sufficiently long so that the output voltage rises monotonically and it does not overshoot its final voltage by more than 5%. During normal soft-start, both the COMP voltage and the switch current limit gradually increase until the converter becomes regulated. If the regulator output is shorted to ground, then the COMP voltage will continue to rise to its 2.4V upper limit. The SC4524 will reach its cycle-bycycle current limit sometime during the soft-start charging phase. As described previously, the switches in the SC4524 either do not turn on at all or for at least 105ns. With the output shorted, the error amplifier will command the regulator to operate at full duty cycle. The current limit comparator will turn off the switch if the switch current exceeds 3.2A. However, this happens only after the switch is turned on for 105ns. During switch off time, the inductor current ramps down at a slow rate determined by the forward voltage of the freewheeling diode and the resistance of the short. If the resulting reverse volt-second is insufficient to reset the inductor before the start of the next cycle, then the inductor current will keep increasing until the diode forward voltage becomes high enough to achieve volt-second balance. This makes the current limit comparator ineffective. Setting the switching frequency below 500kHz at high V IN (> 20V) will make the off time sufficiently long to keep the inductor current within bounds under short circuit condition.Shortening the softstart interval from the onset of switching to hiccup enable also makes short circuit operation more robust. A 2247nF soft-start capacitor is found adequate for most applications. Loop Compensation Figure 10 shows a simplified equivalent circuit of a stepdown converter. The power stage, which consists of the current-mode PWM comparator, the power switch, the freewheeling diode and the inductor, feeds the output network. The power stage can be modeled as a voltagecontrolled current source, producing an output current
a 2006 Semtech Corp. 16
proportional to its controlling input V COMP . Its transconductance G MP is 8W-1. With the current loop closed, the control-to-output transfer function
Y 287 has Y &203
a dominant-pole p2 located at a frequency slightly higher than that of the output filter pole.
wS -
Q,287 Q =9287& 5287 &
(8)
where C1 is the output capacitor, ROUT is the equivalent load resistance and n (depending on duty ratio, slope compensation, frequency and passive components) is usually between 1 and 2. If C1 is ceramic, then its ESR zero can be neglected as it situates well beyond half the switching frequency. The low frequency gain of the control-to-output transfer function is simply the product of power stage transconductance and the equivalent load resistance (Figure 11). The transfer functions of the feedback network and the error amplifier are:
Y )% E 5 U I + V&5 UI =I Y 287 I 5 + 5 U + V 5OI5 & a Y I
(
)
(9)
and
Y &203 *0$52 ( + V& 5 ) Y )% ( + V& 52 ) 1/4 ( + V& 5 )
(10)
provided that & >> & and 52 >> 5 . In Equation (10), C5 forms a low frequency pole p1 with the output resistance RO of the error amplifier and C6 forms a high frequency pole p3 with R5:
52 = $PSOLILHU 2SHQ /RRS *DLQ G% = = 0W 7UDQVFRQGXF WDQ FH mW -
52&
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wS = -
SC4524
POWER MANAGEMENT Applications Information
I V IN POWER STAGE -1 GMP = 8 C11 VCOMP R5 C6 C5 GMA = -1 280 + RO 1.6M FB R1 C1 OUT VOUT ESR ROUT
1V VOLTAGE REFERENCE
R2
Figure 10. Simplified Control Loop Equivalent Circuit
Gain
T( j )
R2 GMA R O R +R 1 2
R2 GMA R 5 R +R 1 2

v COMP v OUT
CC 1R OUT n
1 R OC 5 1 R 5C 5
Z 1
G MP R OUT
n R OUT C1
p 2
1 R 5C 6
C
Control-to-Output Transfer Function
p 1
p 3
S 2
Figure 11. Bode Plots of Control-to-Ouput, Output-to-Control and the Overall Loop Gain. Control-to-output transfer function is shown with two poles near half the switching frequency S.
(c) 2006 Semtech Corp. 17 www.semtech.com
SC4524
POWER MANAGEMENT Applications Information
wS = 5 &
w z1 is shown to be less than w p2 in Figure 11. Making
w ] =
w& w6 = gives a first-order estimate of C5:
w 65
In addition C5 and R5 form a zero with angular frequency:
w = = 5 &
&
(12)
The
output-to-control
transfer
function
Y &203 Y &203 Y )% = 1/4 is also shown in Figure 11. Its midY 287 Y )% Y 287
Notice that R5 determines the mid-band loop gain of the converter. Increasing R5 increases the mid-band gain and the crossover frequency. However it reduces the phase margin. C6 is a small ceramic capacitor to roll off the loop gain at high frequency. Placing p3 at about
& pI5
E 5 U band gain (between z1 and p3) is *0$5 I I 5 + 5 U . The U Y I overall loop gain T(s) is the product of the control-tooutput and the output-to-control transfer functions. To
simplify 7 Mw Bode plot, the feedback network is assumed to be resistive. If the overall loop gain is to cross 0dB at one tenth of the switching frequency ( w& =
w6 gives:
(13)
w 6 pI = ) at 20dB/decade, then its mid-band gain (between z1 and p2) will be
w& = w S
w6 = w 6 & 5 287 Q Q & 5 287
Computed R5, C5 and C6 can indeed result in near optimal load transient responses in over half of the applications. However in other cases empirically determined compensation networks based on optimized load transient responses may differ from those calculated by a factor of 3. Therefore checking the transient response of the converter is imperative. Starting with calculated R5, C5 and C6 (using n=1 in Equations (11)-(13)), apply the largest expected load step to the converter at the maximum operating V IN . Observe the load transient response of the converter while adjusting R5, C5 and C6. Choose the largest R5, the smallest C5 and C6 so that the inductor current waveform does not show excessive ringing or overshoot. Feedforward capacitor C11 boosts phase margin over a limited frequency range and is sometimes used to improve loop response. C 11 will be more effective if
5 >> 5OI5 .
E 5 U This is also equal to *035287 *0$5 I I 5 + 5 U . Therefore U Y I
E 5 U w 6 & 5 287 *03 5 287 *0$ 5 I I 5 + 5 U = Q . U Y I
Re-arranging,
Example: Determine the compensation components for the 550kHz 12V to 3.3V converter in Figure 13(a). For the converter, w 6 = 0UDGV - , ,287
= $ and
E 5U w 6& 5 = I + U I U Q* * 5 Y 03 0$ I
(11)
0$;
& = m) . n is assumed to be 1 in (11) and (12).
a 2006 Semtech Corp.
18
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SC4524
POWER MANAGEMENT Applications Information
E N U 1/4 - U 5 = I + I N U 1/4 1/4 1/4 - I Y = NW
9 ,1
&
&
= Q) N 1/4 p 1/4
S) p 1/4 1/4
9 287
=
/
Bench measurement shows that compensation components computed from our simplified linear model give very good load transient response for the converter.
Figure 12. Fast Switching Current Paths in a Buck Regulator. Minimize the size of this loop to reduce parasitic trace inductance.
Board Layout Considerations In a step-down switching regulator, the input bypass capacitor, the main power switch and the freewheeling
GL (Figure GW 12). For jitter-free operation, the size of the loop formed by these components should be minimized. Since the power switches are already integrated within the SC4524, connecting the anodes of both freewheeling diodes close to the negative terminal of the input bypass capacitor minimizes size of the switched current loop. The input bypass capacitors should be placed close to the VIN pin. Shortening the traces of the SW and BST nodes reduces the parasitic trace inductance at these nodes. This not only reduces EMI but also decreases switching voltage spikes at these nodes.
diode carry discontinuous currents with high
The exposed pad should be soldered to a large analog ground plane as the analog ground copper acts as a heat sink for the device. To ensure proper adhesion to the ground plane, avoid using vias directly under the device.
a 2006 Semtech Corp.
19
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SC4524
POWER MANAGEMENT Typical Application Circuit
W DI !W 9 7TU 8! 8& !!A
(IILFLHQF\
DI

TT
mA
I# G
#' PVU
6&
8PH Q
TX ""mC S !! A7 BI9 8" 9! !7R" 8 !!mA S! ($"x x ""W!6
E A p r v p v s s @
S$ 8% #&A 8$ $A "x
SPT8
S" "&#x
mA
G
)A8vy v pAAQ""S"
8
)AHhhABSH! 7S%E!!%H
Gh qA 8 r A6
8")AHhhABSH"!9S% @ %F
Figure 13(a). 550kHz 12V to 3.3V/2A step down converter.
Gh qA8uh h pr vvp

W A W

Gh qA 8 r A6
Figure 13(b). Load characteristic.
" " WAP ASr r A$ W9DW ! W ADA$ W 9DW
" " WAP A! W9 DW
TT AQ vAW yh tr A
W 9DW Tr AGh qA 8 r A $ 6 9 DW
Y2# 9DW
Y 2# 9DW
Figure 13(c). 12VIN start-up transient at 2A load.
a 2006 Semtech Corp. 20
Figure 13(d). 0.5A to 2A step load transient response.
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SC4524
POWER MANAGEMENT Outline Drawing - SOIC-8 EDP
A N 2X E/2 E1 E 1 ccc C 2X N/2 TIPS 2 e/2 B D aaa C SEATING PLANE A2 A C bxN bbb F EXPOSED PAD H H GAGE PLANE 0.25 L (L1) h A1 C A-B D e D
DIM
A A1 A2 b c D E1 E e F H h L L1 N 01 aaa bbb ccc
DIMENSIONS MILLIMETERS INCHES MIN NOM MAX MIN NOM MAX
.069 .053 .005 .000 .065 .049 .012 .020 .010 .007 .189 .193 .197 .150 .154 .157 .236 BSC .050 BSC .116 .120 .130 .085 .095 .099 .010 .020 .016 .028 .041 (.041) 8 0 8 .004 .010 .008 1.35 1.75 0.13 0.00 1.25 1.65 0.31 0.51 0.25 0.17 4.80 4.90 5.00 3.80 3.90 4.00 6.00 BSC 1.27 BSC 2.95 3.05 3.30 2.15 2.41 2.51 0.25 0.50 0.40 0.72 1.04 (1.05) 8 0 8 0.10 0.25 0.20
h
c
01
SEE DETAIL SIDE VIEW
NOTES: 1. 2. 3. 4.
A
DETAIL
A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -HDIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. REFERENCE JEDEC STD MS-012, VARIATION BA.
Land Pattern - SOIC-8 EDP
E D SOLDER MASK
DIM
(C) F G Z C D E F G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.205) .134 .201 .101 .118 .050 .024 .087 .291 (5.20) 3.40 5.10 2.56 3.00 1.27 0.60 2.20 7.40
Y THERMAL VIA O 0.36mm P X
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. REFERENCE IPC-SM-782A, RLP NO. 300A. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE.
2. 3.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012-8790 Phone: (805)498-2111 FAX (805)498-3804
2006 Semtech Corp. 21 www.semtech.com

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